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DFT

Experience: 8-12 Years

Location: Ahmedabad

Education: BE/ME

Description:

Should have good knowledge about all DFT concepts.

Scan insertion and validation, BIST insertion and validation, ATPG and Pattern Validation w/wo Timing, DFT mode timing Analysis and sign off.

Work experience on various DFT architectures. Knowledge of protocol like IEEE1149.1, IEEE1149.6, IEEE1687 and IEEE1500.

Worked on Pattern diagnosis and Familiarity with ATE, silicon bring up. Should have done 4 tape outs.

Technical Skills:

-          Hands on experience in various DFT aspects like Scan insertion, MBIST and JTAG, ATPG, Pattern validation at block level as well as Fullchip level

-          Synopsys tools: DFT MAX, TetraMAX

OR

-          Cadence tools: RTL Compiler, Encounter Test  

OR

-          Mentor Graphics tools: Tessent tool chain, TestKompress

-          Debussy, VCS/Questa/IUS

-          PT tool from Synopsys




  • Apr 27 2020 |
  • DFT Lead |
  • 4
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DDR

Experience: 4-8 Years

Location: Bangalore/ Ahmedabad

Education: B.E., B.TECH, M.E. M. TECH

Technical Description:

·  At-least 4 years of experience in System Verilog HVL.

· At-least 3 years of experience in OVM/UVM/VMM/Test Harness.

· At-least 2-3 years of experience in working on DDRx family or HBM. Especially DDRx IP – Controller verification and even working at SoC level. DDR4-5-6  is preferable.

· Hands on experience of developing assertion, checkers, coverage and scenario creation.

· Must have executed at-least 1 SoC Verification project

· Experience in developing test and coverage plan, Verification environment and validation plan.

· Knowledge of at-least one industry standard protocols like Ethernet, PCIe, MIPI, USB or similar is required.

Management Description:

· Team handling experience: size 3 or more minimum, duration 1 year minimum

· Define/derive Scope, Estimation, Schedule and Deliverables of proposed work.

· Assure compatibility of resources, tools, platform

· Work with customers through acceptance of deliverables.

· Effectively manage team members through coaching and mentoring and provide guidance and career planning to team-members.

·Ensure customer satisfaction.







  • Apr 27 2020 |
  • Sr Engineer |
  • 4
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Processor Verification

Experience: 4-6 Years

Job Location: Pune

Education: B.E., B.TECH, M.E. M. TECH

Description:

Person will be responsible for module level and full chip functional verification. He will also be responsible for creating testplans, develop test bench, coverage and GLS 

Minimum 3 years’ experience in SV and Coverage driven verification is a must.  The person should have some knowledge in processor verification

He should be very well versed with  UVM

Skillset requirement:

a) Design Languages: Verilog

b) Scripting: shell, Perl (good to have)

c) General Purpose languages: C, C++.

d) Domain knowledge (Buzz words for search)

e) Processor verification, Ethernet, PCIe

Previous work experience on Intel project is a plus

Soft Skills:

This job involves good written and verbal skills.

Highly motivated technical person with business development is required. Team player





  • Apr 27 2020 |
  • Sr Engineer |
  • 2
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Ethernet

Experience: 4-6 Years

Job Location: Bangalore

Education: B.E., B.TECH, M.E. M. TECH

Description:

Minimum 3 years’ experience in SV and Coverage driven verification is a must.  The person should have expertise in any one of the networking protocols like Ethernet, Gigabit Ethernet or OTN .

He should be very well versed with  UVM

Skillset Required:

a) Design Languages: Verilog, VHDL (must)

b) Scripting: shell, Perl (good to have)

c) General Purpose languages: C, C++. (good to have)

F) Domain knowledge (Buzz words for search):

e) Network Processors functions: TCP, IPv4, IPv6, VLAN, packet classification, Firewall, TCP offload, traffic shaping, QoS, Load Balancing, Switching, Routing,

b. Standardized Interfaces: Ethernet (CAUI, XGMII, XAUI, SGMII),  DDR2, DDR3, OTN, switch fabric background.


  • Apr 27 2020 |
  • Sr Engineer |
  • 3
Apply Now

Formal Verification

Job Location: Bangalore

Experience: 4-15 Years

Description:

• Minimum 4 years of experience working of on Verification using Formal tools. 
• The job involves very close interaction with the design team and with other validation teams.
• Review functional and micro-architectural specifications, define the scope for formal verification, and create high-quality formal verification testplans to sign-off on the corresponding design implementation.
• Build formal verification testbenches, code assertions and constraints, and apply abstraction techniques to converge the targeted properties or to achieve reasonable proof-depth.
• Apply formal coverage techniques for analysing over-constraints and for measuring functional coverage. Design and develop functional verification flows that involve both vendor and internally developed formal tools.
• Experience on Cadence/Synopsys/mentor formal verification tool required

• Minimum 8 years of experience working of on Verification using Formal tools. 
• The job involves very close interaction with the design team, architecture team, with other validation teams. You will help decide on the best applications of formal verification techniques to various parts of the design Develop scripts (Perl and Python) and build flows (Makefile and CMake) to enable.
• Review functional and micro-architectural specifications, define the scope for formal verification, and create high-quality formal verification testplans to sign-off on the corresponding design implementation.
• Define Formal verification testbench architecture
• Build formal verification testbenches, code assertions and constraints, and apply abstraction techniques to converge the targeted properties or to achieve reasonable proof-depth.
• Apply formal coverage techniques for analysing over-constraints and for measuring functional coverage. Design and develop functional verification flows that involve both vendor and internally developed formal tools.
• Experience on Cadence/Synopsys/mentor formal verification tool required
• Has ability to lead team and guide team members. Has ability to take ownership of deliverable to customer.

  • Apr 27 2020 |
  • Senior Engineer / Lead |
  • 4
Apply Now

Verification PCle Lead

Description:

Experience : 5 Yrs - 8 Yrs

Job Location : Bangalore/ Ahmedabad

Education : B.E., B.TECH, M.E. M. TECH

Minimum 5+ years of experience working of SV and UVM methodology.  

Expertise in Verification Environment development,

Expertise in deriving Feature List, Test-plan, Erroneous, Directed and Random Testsuit development and debugging.

Expertise in deriving Functional coverage matrix, Assertion Matrix etc

Should be capable to  achieve closure on Functional and Code coverage, and regression management

Expertise in PCIe legacy and PCIe Gen3, Gen4, Gen5 protocols is must.

Expertise in verifying any type of PHY controller will be advantageous.

Expertise in IP as well as SOC verification

Perl/shell scripting is a good to have



  • Apr 27 2020 |
  • Verification Leaad |
  • 4
Apply Now

Sr Manager – NMS Software

Responsibilities:

  • Sr Manager will lead and drive the development of software architecture platform for the next generation of software products SDN, EMS/NMS, NFV directly or through a set of managers.

  • Will oversee design, development, test and maintenance of a large-scale network management application utilizing the latest technologies.

  • Architect, develop, maintain and integrate various enterprise server modules.

  • Ownership and responsibility for all phases of Software Development Life Cycle (SDLC) with product marketing, engineering, and testing teams, with Agile process and methodology.

  • Be responsible for large software deliverables, working cross-functionally to ensure software delivering on time, within budget, and with high quality.

  • Qualifications:

    • Working experience of leading network management system development with carrier grade telco tier 1, tier 2, and tier 3 customers and new age data-center customers.

    • Engineering leadership in successfully delivering EMS/NMS project to large tier-1 telecom service providers and led a team of at least 50 staff.
    • Experience working across global sites.
    • Working experience and knowledge of telecom background with transport networks and/or access networks, network management (FCAPS), and OAMP.
    • Working experience and knowledge of Telco and MSO back office operations and systems.
    • Working experience and knowledge of management of Optical Transport/Ethernet/IP networks.
    • Knowledge of Network Management interfaces. e. g. Netconf/YANG, SNMP, SOAP, REST, OSI, TL1, CLI.
    • Experience with latest Object-Oriented methodologies, Java, OSGI, SDN, ODL, Web Services, DBMSs, and NoSQL database.
    • Knowledge of SDN controller, OpenDayLight, ONOS, MD-SAL.
    • Experience with Enterprise application clustering, HA solutions, scalability, etc.
    • Experience with SAAS, PAAS, cloud-based computing, etc.
    • Strong knowledge and experience of Agile software development methodology.
    • Strong analytical and problem solving skills.
    • Excellent interpersonal skills
    • Project/program management skills
    • Minimum of 15 years of Telecom development experience out of which at least 10+ years management leadership experience.

    • Location: Bangalore / Chennai

    • Travel: 10%


  • Apr 27 2020 |
  • Senior Manager |
  • 1
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